Pre-Layout Activity Prediction for FPGAs Jason H. Anderson University of...  Home/Search
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Abstract: It is well-known that dynamic power dissipation in digital CMOS circuits depends linearly on switching activity. In this paper, we study switching activity in a commercial FPGA and propose a novel approach to pre-layout activity prediction. We examine how switching activity on a net changes when delays are zero (zero delay activity) versus when logic delays are considered (logic delay activity) versus when both logic and routing delays are considered (routed delay activity). Low-power synthesis ... (Update)
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BibTeX entry: (Update)
@misc{ prediction-switching,
author = "Pre-Layout Activity Prediction",
title = "Switching Activity Analysis and",
url = "citeseer.ist.psu.edu/580550.html" }
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