Design of a Pipelined DSP Microprocessor – MUN DSP2000
Download:
by Cheng Li, Lu Xiao, Qiyao Yu, P. Gillard, R. Venkatesan
http://www.engr.mun.ca/~licheng/paper/NECEC_paper2_final_revision_2.PDF
Add To MetaCart
Abstract:
Programmable digital signal processing (DSP) microprocessors are the processors that are designed to perform in digital signal processing-intensive applications. In this paper, We present the design of a simplified DSP microprocessor with a restricted instruction set – MUN DSP2000, which consists of three major components: the control unit, the datapath and the system memory. A Harvard architecture, pipelined datapath and data forwarding techniques are used to improve the system performance and avoid hazards (data hazard, control hazard, etc.). The whole system is coded using VHDL and simulated using Synopsys CAD tools. The system performance is briefly analyzed based on the synthesis results.
Citations
No citations identified.
