12.2 Dynamic Microarchitecture Adaptation via Co-Designed Virtual Machines
Abstract:
As microarchitecture and circuit technologies evolve, tradeoffs involving performance, power, and design complexity become increasingly difficult, and optimization methods become increasingly sophisticated. An important next step is toward microarchitectures that dynamically adapt to changing program characteristics. Researchers have put forward several proposals for multi-configuration hardware subsystems targeted at performance and/or power optimization. 1. Caches and TLBs: Total size, line size, and ways can be configured dynamically to match program requirements. Power can be saved by using the smallest structures that give adequate performance. 2. Branch predictors: Global history length can be varied to optimize performance. Powering down unneeded portions of a complex predictor can save power. 3. Issue windows and pipelines: To save power, sections of the instruction issue window can be shut down when there is a low instruction parallelism. Portions of clustered microarchitectures can be disabled when not needed. Simultaneously managing several such multi-configuration units is a complex optimization problem. To manage this complexity, we are developing a co-designed virtual machine (VM), a
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