A PROGRAMMABLE COMMUNICATIONS PROCESSOR FOR THIRD GENERATION WIRELESS COMMUNICATION SYSTEMS
Abstract:
This paper presents the architecture requirements for a programmable communications processor for baseband signal processing in 3G wireless communication systems. Third generation communication systems are being designed to provide extremely high data rates such as up to 2 Mbps for wireless cellular systems and up to 100 Mbps for wireless LAN systems. Along with these data rates, the standards also specify support for enhanced features such as multiple rates, quality-of-service, multimedia support and flexibility in the algorithms and parameters used in the communication systems. Though these high data rate requirements may be met by application-specific VLSI architectures, the flexibility requirements for 3G systems motivate the need for more programmable solutions. In this work, we show the reasons that current generation programmable processors are inadequate to meet the needs of 3G communication systems. We specify the nature of the workloads and the processing requirements for baseband signal processing for 3G communication systems and present the features that need to be present in a programmable architecture. As an example, we show how bit-level extensions for operations in typical algorithms for estimation and detection in CDMA-based cellular systems can provide significant speedup in data rates.
