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Abstract: In this paper the non-linear relationship between power consumption and throughput in two-phase self-timed (ST) pipelines is demonstrated. This effect is explained by connecting two well-known phenomena: first, the adaptation between instantaneous logic depth and data rate, an attribute inherent to two-phase selftimed pipelines; and second, the increment of data path power consumption with the logic depth, due to the influence of spurious activity. Thus, in a ST pipeline, the slope P/f for a... (Update)
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BibTeX entry: (Update)
@misc{ boemo-logic,
author = "Eduardo Boemo and J. Herrera Camacho and J. Meneses",
title = "Logic depth and power consumption in self-timed circuits: A case-study",
url = "citeseer.ist.psu.edu/523963.html" }
Citations (may not include all citations):296 Low-Power CMOS Digital Design - Chandrakasan, Sheng et al. - 1992
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78 Micropipelines (context) - Sutherland - 1989
7 Third Edition (context) - Logic, Book - 1995
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