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Abstract: Current methods of designing VLSI chips do not insure that the chips will perform correctly when manufactured. Because the turnaround time on chip fabrication varies from a few weeks'to a few months, a scheme other than "try it and see if it works" is needed. Checking of chips by hand simulation and visual inspection of checkplots will not catch all of the erros In addition, the number of transistors per chip is likely to increase from ten thousand to over a million in the next few years. lhis... (Update)
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BibTeX entry: (Update)
@techreport{ baker80artwork,
author = "C. M. Baker",
title = "{ARTWORK} {ANALYSIS} {TOOL} {FOR} {VLSI} {CIRCUITS}",
number = "MIT/LCS/TR-239",
pages = "75",
year = "1980",
url = "citeseer.ist.psu.edu/521147.html" }
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