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Analysing a Multistreamed Superscalar Speculative Instruction Fetch Mechanism  (Make Corrections)  
Rafael R. dos Santos, Philippe O. A. Navaux
European Conference on Parallel Processing



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Abstract: This work presents a new model for multistream speculative instruction fetch in superscMar architectures. The performance evMuation of a superscalar architecture with this feature is presented in order to validate the model and to compare its performance with a real superscalar architecture. This model intends to ehminate the instruction fetch latency introduced by branch instructions in superscalar pipehnes. (Update)

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BibTeX entry:   (Update)

@inproceedings{ santos98analysing,
    author = "Rafael R. dos Santos and Philippe O. A. Navaux",
    title = "Analysing a Multistreamed Superscalar Speculative Fetch Mechanism",
    booktitle = "European Conference on Parallel Processing",
    pages = "1010-1017",
    year = "1998",
    url = "citeseer.ist.psu.edu/520138.html" }
Citations (may not include all citations):
146   A Comparison of Dynamic Branch Predictors that use Two Level.. - Tsc-Yu, Yale - 1993
57   Simultaneous Multithreading: A Platform for Next-Generation .. - Susan - 1997
4   Reducing the Impact of the Branch Problem in Super- pipeline.. (context) - Adam - 1995
1   Branching on Superscalar Machines: Speculative Execution of .. (context) - Richard - 1995
1   Two-Level Adaptive Trafining Branch Pre- diction (context) - Tse-Yu, Yale - 1991
1   A Mechanism for Multistreamed Speculative Instruction Fetch (context) - Rafael, dos - 1997
1   Computer Architetcure News (context) - SOHI, BREACH et al. - 1995
1   Trace Processors: Moving to Fourth-Generation (context) - James, VAJAPEYAM - 1997
1   A Superscalar Architecture with Multiple Instruction Streams (context) - FILHO - 1996

Documents on the same site (http://www-gppd.inf.ufrgs.br/projects/apse/index.html):
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A Simulator for SMT Architectures: Evaluating.. - Goncalves.. (2000)   (Correct)

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