Communication-minimal partitioning of parallel loops and data arrays for cache-coherent distributed-memory multiprocessors (1996) [17 citations — 2 self]
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@INPROCEEDINGS{Barua96communication-minimalpartitioning,author = {Rajeev Barua and David Kranz and Anant Agarwal},
title = {Communication-minimal partitioning of parallel loops and data arrays for cache-coherent distributed-memory multiprocessors},
booktitle = {In Proceedings of the Ninth Workshop on Languages and Compilers for Parallel Computing},
year = {1996},
pages = {350--368},
publisher = {Springer-Verlag}
}
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Abstract:
Harnessing the full performance potential of cache-coherent distributed shared memory multiprocessors without inordinate user effort requires a compilation technology that can automatically manage multiple levels of memory hierarchy. This paper describes a working compiler for such machines that automatically partitions loops and data arrays to optimize locality of access. The compiler implements a solution to the problem of finding communication-minimal partitions of loops and data. Loop and data partitions specify the distribution of loop iterations and array data across processors. A good loop partition maximizes the cache hit rate while a good data partition minimizes remote cache misses. The problems of finding loop and data partitions interact when multiple loops access arrays with differing reference patterns. Our algorithm handles programs with multiple nested parallel loops accessingmany arrays with array access indices being general affine functions of loop variables. It discovers communication-minimal partitions when communication-free partitions do not exist. The compiler also uses sub-blocking to handle finite cache sizes. A cost model that estimates the cost of a loop and data partition given machine parameters such as cache, local and remote access timings, is presented. Minimizing the cost as estimated by our model is an NP-complete problem, as is the fully general problem of partitioning. A heuristic method which provides good approximate solutions in polynomial time is presented. The loop and data partitioning algorithm has been implemented in the compiler for the MIT Alewife machine. The paper presents results obtained from a working compiler on a 16-processor machine for three real applications: Tomcatv, Erlebacher, and Conduct. Our results demonstrate that combined optimization of loops and data can result in improvements in runtime by nearly a factor of two over optimization of loops alone. 1
