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Abstract: Reduction of the number of operations optimizes the important design metrics such as area, cost, throughput, and power consumption for both custom ASIC and programmable processor implementations. We propose a novel technique to minimize the number of operations in DSP computations. The first step of the approach logically partitions a computation into strongly connected components. The second step optimizes each component separately. In the third step the components are merged to further... (Update)
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BibTeX entry: (Update)
@misc{ usa-ucla,
author = "Es Ca Usa",
title = "UCLA Computer Science Department, Los Angeles, CA 90095-1596, USA",
url = "citeseer.ist.psu.edu/502447.html" }
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1 Minimizing the Number of Operations in DSP Computations (context) - Hong, Potkonjak
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