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Abstract: Design and digital simulation of the DLX Microprocessor created and described by J. L. Hennessy and D. A. Patterson in their book Computer Architecture -- A Quantitative Approach. Prepared by: Zhan Zhang Qiang Qiang Dec.13, 2000 ECES485 Final Project Z.Zhang Q.Qiang 1 DLX is a 32-bit RISC microprocessor with a simple load-store architecture. It has a 32bit linear address, 4GB memory space and uses 32 32-bit general-purpose registers, GPRs, (R 0 to R 31 ) with Harvard architecture (separate... (Update)
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BibTeX entry: (Update)
@article{ zhang00design,
author = "Xiaokun Zhang and Sivaram Balasubramanian and Robert W. Brennan and Douglas H. Norrie",
title = "Design and implementation of a real-time holonic control system for manufacturing",
journal = "Information Sciences",
volume = "127",
number = "1-2",
pages = "23-44",
year = "2000",
url = "citeseer.ist.psu.edu/article/zhang00design.html" }
Citations (may not include all citations):1 Invalid instruction (context) - handling, interrupt
1 Digital simulation under different conditions (context) - control
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