The main obstruction to automatic verication of concurrent systems is the huge amount of memory required to complete the verication task (state explosion) In this paper we present a probabilistic algorithm for automatic verication via model checking. Our algorithm trades space with time. In particular, when our memory is over because of state explosion our algorithm does not give up verication. Instead it just proceeds at a lower speed and its results will only hold with some arbitrarily small error probability. Our preliminary experimental results show that using our probabilistic algorithm we can typically save more than 30 % of RAM with an average time penalty of about 100 % w.r.t. a deterministic state space exploration with enough memory to complete the verication task. This is better than having to give up the verication task because of lack of memory.
|
2317
|
Graph-Based Algorithms for Boolean Function Manipulation
– Bryant
- 1986
|
|
1258
|
Randomized Algorithms
– Motwani, Raghavan
- 1995
|
|
1128
|
Symbolic Model Checking
– McMillan
- 1993
|
|
374
|
Symbolic model checking: 10’’ states and beyond
– Burch, Clarke, et al.
- 1990
|
|
297
|
Formal methods: State of the art and future directions
– Clarke, Wing
- 1996
|
|
246
|
Model checking programs
– Visser, Havelund, et al.
- 2003
|
|
218
|
The SPIN Model Checker
– Holzmann
- 2003
|
|
127
|
State-based model checking of event-driven system requirements
– Atlee, Gannon
- 1993
|
|
66
|
Using abstraction and model checking to detect safety violations in requirements specifications
– Heitmeyer, Jr, et al.
- 1998
|
|
65
|
Elements of style: Analyzing a software design feature with a counterexample detector
– Jackson, Damon
- 1996
|
|
60
|
Reliable Hashing without Collision Detection
– Wolper, Leroy
- 1993
|
|
57
|
An Analysis of Bitstate Hashing
– Holzmann
- 1998
|
|
26
|
Using magnetic disk instead of main memory in the Murϕ verifier
– Stern, Dill
|
|
24
|
Test generation derived from model-checking
– JÉRON, MOREL
- 1999
|
|
23
|
State Compression in SPIN: Recursive Indexing and Compression Traning Runs
– Holzmann
- 1997
|
|
21
|
Better veri through symmetry
– Ip, Dill
- 1996
|
|
18
|
Binary decision diagrams on network of workstations
– Ranjan, Snaghavi, et al.
- 1996
|
|
15
|
Protocol veri as a hardware design aid
– Dill, Drexler, et al.
- 1992
|
|
14
|
On the random walk method for protocol testing
– Mihail, Papadimitriou
- 1994
|
|
12
|
High performance BDD package by exploiting memory hiercharchy
– Sanghavi, Ranjan, et al.
- 1996
|
|
10
|
Model checking large software speci
– Chan, Anderson, et al.
- 1998
|
|
9
|
Memory ecient algorithms for the veri of temporal properties
– Courcoubetis, Vardi, et al.
- 1992
|
|
8
|
Parallelizing the Mur' veri
– Stern, Dill
- 1997
|
|
7
|
Improved Probabilistic Veri by Hash Compaction
– Stern, Dill
- 1995
|
|
7
|
Exploiting transition locality in automatic verification of finite state concurrent systems
– Penna, Intrigila, et al.
- 2001
|
|
4
|
New techniques for ecient veri with implicitly conjoined BDDs
– Hu, York, et al.
- 1994
|
|
3
|
Automating Software Feature Veri
– Holzmann, Smith
- 2000
|
|
3
|
Ecient veri of symmetric concurrent systems
– Ip, Dill
- 1993
|
|
1
|
A new scheme for memorye cient probabilistic veri
– Stern, Dill
- 1996
|
|
1
|
Implementation of an ef parallel bdd package
– Stornetta, Brewer
- 1996
|
|
1
|
Hardware veri boolean logic programming, boolean functional programming
– Tronci
- 1995
|
|
1
|
Veri of concurrent client-server real-time scheduling systems
– Wang, Hsiung, et al.
- 1999
|
|
1
|
Procedure-level veri of real-time concurrent systems
– Wang, Lo
- 1999
|
