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Abstract: Inc., is a commercially marketed product based on CVE, which includes Verilog support as well. RuleBase [Beer et al. 1996], developed at IBM, is an industry-oriented model-checking tool built on SMV that provides a graphical user interface, a temporal logic defined on top of CTL, support for VHDL and Verilog, and debugging support. VIS [Brayton et al. 1996] integrates model checking with other verification techniques such as combinational and sequential equivalence checking. VIS accepts design ... (Update)
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BibTeX entry: (Update)
C. Kern and M. Greenstreet, "Formal Verification in Hardware Design: A Survey", ACM Transactions on Design Automation of E. Systems, Vol. 4, pp. 123-193, April 1999. http://citeseer.ist.psu.edu/article/kern99formal.html More
@article{ kern99formal,
author = "Christoph Kern and Mark R. Greenstreet",
title = "Formal verification in hardware design: a survey",
journal = "ACM Transactions on Design Automation of Electronic Systems.",
volume = "4",
number = "2",
pages = "123--193",
year = "1999",
url = "citeseer.ist.psu.edu/article/kern99formal.html" }
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51 Springer-Verlag (context) - in, Science
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1 Symbolic model checking (context) - Laxenburg, CLARKE et al. - 1994
1 A simple theorem prover based on symbolic trajectory evaluat.. (context) - in, Science et al. - 1995
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