Cache Coherence Protocol and its Implementation in a Bidirectional Ring based Multiprocessor
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by Muhammad Jaseemuddin, Zvonko G. Vranesic
http://www.eecg.toronto.edu/~jaseemud/tr.ps.Z
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Abstract:
In this report an invalidation based cache coherence protocol for the bidirectional ring is presented. The relative performance of the bidirectional ring in comparison with the hierarchy of unidirectional rings is also evaluated. The proposed cache coherence scheme is found to give good performance for the bidirectional ring. The performance is estimated by simulating a practical system running actual applications. The improvement in the overall performance indicates the potential benefits of using bidirectional rings. The bidirectional ring handles communication traffic more efficiently and shows less sensitivity to the traffic pattern. 1
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