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  Trace Cache: a Low Latency Approach to High Bandwidth Instruction Fetching (1996) [262 citations — 13 self]

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by Eric Rotenberg, Eric Rotenberg, Steve Bennett, Steve Bennett, James E. Smith, James E. Smith
In Proceedings of the 29th International Symposium on Microarchitecture
ftp://ftp.cs.wisc.edu/sohi/papers/1996/micro.trace-cache.ps.gz
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Citations

705 Improving direct-mapped cache performance by the addition of a samll fully-associative cache and prefetch buffers – Jouppi - 1990
374 A study of branch prediction strategies – Smith - 1981
335 Limits of instruction-level parallelism – Wall - 1991
242 Alternative implementations of two-level adaptive branch prediction, in – Yeh, Patt - 1992
224 Branch prediction strategies and branch target buffer design – Lee, Smith - 1984
174 Improving the accuracy of dynamic branch prediction using branch correlation – Pan, So, et al. - 1992
120 Optimization of instruction fetch mechanisms for high issue rates – Conte, Menezes, et al. - 1995
100 Increasing the instruction fetch rate via multiple branch prediction and a branch address cache – Yeh, Marr, et al. - 1993
89 Efficient program tracing – Larus - 1993
84 Branch History Table Prediction of Moving Target Branches due to Subroutine Returns – Kaeli, Emma - 1991
76 The microarchitecture of superscalar processors – Smith, Sohi - 1995
66 Instruction Fetching: Coping with Code Bloat – Uhlig, Nagle, et al. - 1995
58 A comprehensive instruction fetch mechanism for a processor supporting speculative execution – Yeh, Patt - 1992
47 A fill-unit approach to multiple instruction issue – Franklin, Smotherman - 1994
43 Hardware support for large atomic units in dynamically scheduled machines – Melvin, Shebanow, et al. - 1988
40 Control Flow Prediction with Tree-Like Sub-Graphs for Superscalar – Dutta, Franklin - 1995
26 The effect of speculatively updating branch history on branch prediction accuracy, revisited – Hao, Chang, et al. - 1994
23 Two-Level Adaptive Branch Prediction and Instruction Fetch Mechanisms for High Performance Superscalar Processors – Yeh - 1993
17 Machine Organization of the IBM RISC System/6000 processor – Grohoski - 1990
9 MIPS R10000 Uses Decoupled Architecture," Microprocessor Report – Gwennap - 1994
5 Generalized history table for branch prediction – LOSQ - 1982
1 Machine organization of the ibm rs/6000 processor – Grohoski - 1990
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