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On Model Checking Synchronised Hardware Circuits (2000)  (Make Corrections)  (1 citation)
Martin Leucker
Proceedings of the 6th Asian Computing Conference (ASIAN'00)



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Abstract: . In this paper, we present a framework for specifying and verifying an important class of hardware systems. These systems are build up from a parallel composition of circuits switching by a global clock. They can equivalently be characterised by Petri nets with a maximal step semantics. As a semantic model for these systems we introduce Distributed Synchronous Transition Systems (DSTS) which are distributed transition systems with a global clock synchronising the executions of actions.... (Update)

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...a global clock. Another model are Petri nets supplied with a maximal step semantics [Muk92] The approach was partly introduced in [Leu00] The idea underlying this model is somehow a reinforcement of the true concurrency approach. If two actions a and b are supposed to occur...

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BibTeX entry:   (Update)

M. Leucker. On model checking synchronised hardware circuits. In J. He and M. Sato, editors, Proceedings of the 6th Asian Computing Conference (ASIAN'00), volume 1961 of Lecture Notes in Computer Science, pages 182--198, Penang, Malaysia, November 2000. Springer. http://citeseer.ist.psu.edu/article/leucker00model.html   More

@inproceedings{ leucker00model,
    author = "Martin Leucker",
    title = "On model checking synchronised hardware circuits",
    booktitle = "Proceedings of the 6th Asian Computing Conference ({ASIAN'00})",
    volume = "1961",
    publisher = "Springer",
    address = "Penang, Malaysia",
    editor = "Jifeng He and Masahiko Sato",
    pages = "182--198",
    year = "2000",
    url = "citeseer.ist.psu.edu/article/leucker00model.html" }
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