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Abstract: Software timing estimation is essential for the scheduling and validation of real-time systems while software power estimation is needed for telecommunication applications where fixed power budgets like batteries for hand held terminals or limited power supplies for pico cellular base stations exist. Pure simulation often is impossible due to the lack of relevant input data while pure static analysis delivers wide and expensive result intervals. An approach based on input data classification is ... (Update)
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BibTeX entry: (Update)
@misc{ in-esprit,
author = "Strategic Research In",
title = "Esprit 21929 -- Media",
url = "citeseer.ist.psu.edu/412629.html" }
Citations (may not include all citations):1575 Computer Architecture: A Quantitative Approach (context) - Hennessy, Patterson - 1996
866 Techniques and Tools (context) - Aho, Sethi et al. - 1987
193 Superscalar Microprocessor Design (context) - Johnson - 1991
167 Calculating the maximum execution time of real time programs (context) - Puschner, Koza - 1989
161 Power analysis of embedded software: A first step towards so.. - Tiwari, Malik et al. - 1994
129 Low Power Design Methodologies (context) - Rabaey, Pedram - 1996
109 Advanced Compiler Design Implementation (context) - Muchnick - 1997
103 Experiments with a program timing tool based on source level.. (context) - Park, Shaw - 1990
91 An accurate worst case timing analysis for RISC processors - Lim - 1995
54 Evaluating tight execution time bounds of programs by annota.. (context) - Mok - 1989
53 Automatic-repeat-request error-control schemes (context) - Lin - 1984
49 CMOS RISC microprocessor (context) - Montanaro, -MHz - 1996
49 Cache modeling for real-time software: Beyond direct mapped .. (context) - Li, Malik et al. - 1996
48 Bounding pipeline and instruction cache performance (context) - Healy - 1999
42 ARM System Architecture (context) - Furber - 1996
31 Efficient worst case timing analysis of data caching - Kim, Min et al. - 1996
31 Building an Optimizing Compiler (context) - Morgan - 1998
29 Analysis of Cache Performance for Operating System and Multi.. (context) - Agarwal - 1989
24 Performance Analysis of Real--Time Embedded Software (context) - Li, Malik - 1999
20 Predicting Deterministic Execution Times of Real--Time Progr.. (context) - Park - 1992
17 Abstrakte Interpretation logischer Programme: Theorie (context) - Fecht - 1997
17 Fast timing analysis for hardware-software cosynthesis (context) - Ye, Ernst - 1993
9 Fast Simulation of Computer Architectures (context) - Conte, Gimarc - 1995
7 Advanced RISC Machines Architectural Reference Manual (context) - Jaggar - 1996
7 A path-based estimation technique for estimating hardware ru.. (context) - Henkel, Ernst - 1995
6 lp solve (context) - Berkelaar, Dirks - 1997
5 On predicting data cache behaviour for real-time systems (context) - Ferdinand, Wilhelm - 1998
5 Instruction level power analysis and optimisation of softwar.. (context) - Tiwari, Malik et al. - 1996
4 Software execution from executable specification (context) - Gong, Gajski et al. - 1994
3 A simulation model for the operation and maintenance functio.. - Doboli, Hallberg et al. - 1995
3 Embedded program timing analysis based on clustering and arc.. (context) - Ye, Ernst - 1997
3 Timermon: A time-tracing hardware for instrumenting real-tim.. - Lee, Lee et al. - 1998
3 Worst case timing estimation based on symbolic execution - Ye, Ernst - 1995
3 The ARM RISC Chip: A Programmer's Guide (context) - Someren, Atack - 1993
2 DINERO III Cache Simulator: Code and Documentation (context) - Hill - 1998
1 Cache Behaviour Prediction for Real-Time Systems (context) - Ferdinand - 1997
1 Modeling of an ATM multiplexer in a network terminal for a m.. (context) - Horn, Jantsch - 1998
1 System exploration and synthesis from SDL of telecom network.. (context) - Ykman, Verkest et al. - 1999
1 First version of estimation and partitioning tools (context) - Wolf, Ernst - 1997
1 System-level power estimation and optimisation - challenges .. (context) - Rabaey - 1997
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