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Abstract: This work presents a novel approach for evaluating the quality of the model checking process. Given a model of a design (or implementation) and a temporal logic formula that describes a specification, model checking determines whether the model satisfies the specification. Assume that all specification formulas were successfully checked for the implementation. Are we sure that the implementation is correct? If the specification is incomplete, we may fail to find an error in the implementation.... (Update)
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BibTeX entry: (Update)
@inproceedings{ katz99have,
author = "Sagi Katz and Orna Grumberg and Daniel Geist",
title = ""Have I written enough Properties?" --- A Method of Comparison between Specification and Implementation",
booktitle = "Conference on Correct Hardware Design and Verification Methods",
pages = "280--297",
year = "1999",
url = "citeseer.ist.psu.edu/article/katz99have.html" }
Citations (may not include all citations):828 Model Checking - Clarke, Grumberg et al. - 1999 ACM DBLP
297 Symbolic Model Checking (context) - McMillan - 1993 ACM DBLP
191 Temporal verifications of Reactive Systems - Safety (context) - Manna, Pnueli - 1995
106 An algebraic definition of simulation between programs (context) - Milner - 1971 ACM DBLP
42 on Programming Languages and Systems (context) - Grumberg, Long et al. - 1994
36 Rulebase - an industry oriented formal verification tool - Beer, Ben-David et al. - 1996
27 Fair simulation - Henzinger, Kupferman et al. - 1997 ACM DBLP
18 The SMV System DRAFT (context) - McMillan - 1992
10 Coverage estimation for symbolic model checking - Kam, Zhao - 1999 ACM DBLP
9 A method for symbolic verification of synchronous circuits (context) - Filkorn
7 North-Holland (context) - --, April - 1991
2 A Proof of Lemma 1 Lemma 1 ReachSIM is a simulation preorder.. (context) - Weyuker, Jeng et al. - 1991
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