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Abstract: this report, access ordering algorithms and performance models are derived for a single module memory system. Future reports will present ordering algorithms for parallel memory systems. The following sections introduce access ordering and define the scope of the work presented here. 1.1 General System Model (Update)
Context of citations to this paper: More
...bandwidth for non caching register loads. He derives his algorithms relative to a precise analytic model of memory systems [Moy92a,Moy92b,Moy92c,Moy93]. Since the best ordering cannot be determined without address alignment information that is not generally available at...
...system, word a maps to module . 1. 1 Background This work builds on previous analytic results derived for a single module memory system [Moye92a]. To make this document self contained, the necessary analysis from that report is repeated here. Readers familiar with previous work...
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BibTeX entry: (Update)
S.A. Moyer, "Access Ordering Algorithms for a Single Module Memory", University of Virginia Institute for Parallel Computation, Report IPC-92-02, December 1992. http://citeseer.ist.psu.edu/article/moyer92access.html More
@techreport{ moyer92access,
author = "Steven A. Moyer",
title = "Access Ordering Algorithms for a Single Module Memory",
number = "IPC-92-02",
month = "18,",
year = "1992",
url = "citeseer.ist.psu.edu/article/moyer92access.html" }
Citations (may not include all citations):376 The Cache Performance and Optimizations of Blocked Algorithm.. (context) - Rothberg-E - 1991
158 Improving Register Allocation for Subscripted Variables - Carr-S - 1990
149 Software Prefetching (context) - Kennedy-K - 1991
121 An Architecture for Software-Controlled Data Prefetching (context) - Levy-H - 1991
107 Global Instruction Scheduling for Superscalar Machines (context) - Rodeh-M - 1991
46 A Study of Scalar Compilation Techniques for Pipelined Super.. (context) - Smith-J - 1990
40 Code Generation for Streaming: an Access/Execute Mechanism (context) - Davidson-J - 1991
33 Blocking Linear Algebra Codes for Memory Hierarchies - Kennedy-K - 1989
14 the Floating-Point Performance of the i860 Microprocessor (context) - On - 1990
9 Lawrence Livermore National Laboratory (context) - FORTRAN, MFLOPS
5 i860 64-Bit Microprocessor Hardware Reference Manual (context) - Corporation - 1989
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