A Time-Multiplexed FPGA Architecture for Logic Emulation (1995) [22 citations — 0 self]

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by David Jones, David Jones

In IEEE Custom Integrated Circuits Conference

http://www.eecg.toronto.edu/~lewis/students/theses/dej.thesis.ps

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@INPROCEEDINGS{Jones95atime-multiplexed,
    author = {David Jones and David Jones},
    title = {A Time-Multiplexed FPGA Architecture for Logic Emulation},
    booktitle = {In IEEE Custom Integrated Circuits Conference},
    year = {1995},
    pages = {495--498},
    publisher = {IEEE}
}

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Citations

218	FlowMap: An Optimal Technology Mapping Algorithm for Delay Optimization in Lookup-Table Based FPGA Designs – Cong, Ding - 1994
142	On a pin versus block relationship for partitions of logic graphs – Landman, Russo - 1971
81	The Programmable Logic Data Book – XILINX - 1999
79	Virtual wires: Overcoming pin limitations in FPGA-based logic emulators – Babb, Tessier, et al. - 1993
62	Logic synthesis and optimization benchmarks, version 3.0 – Yang - 1991
45	IRSIM: An incremental MOS switch-level simulator,” in Proc. 26th Design Auromution Cont – Salz, Horowitz - 1989
44	Mattheyses, "A Linear-Time Heuristic for Improving Network Partitions – Fiduccia, M - 1982
18	Architecture of programmable gate arrays: The effect of logic block functionality on area efficiency – Rose, Francis, et al. - 1990
16	The Yorktown Simulation Engine – Denneau - 1982
16	The FPID Family Data Sheet – I-Cube - 1994
15	Performance-oriented fully routable dynamic architecture for a field programmable logic device – Bhat, Chaudhary, et al. - 1993
12	The Yorktown Simulation Engine: Introduction – Pfister - 1982
6	Hardware Emulation Draws Speed from Innovative 3D Parallel Processing Based on Custom ICs. Electronic Design – Maliniak - 1994
5	Future Directions of Dynamically Reprogrammable Systems – Butts - 1995
5	Operating System Concepts (3rd ed – Silberschatz, Peterson, et al. - 1991
3	et al., "TIERS: Topology Independent Pipelined Routing and Scheduling for VirtualWire Compilation – Selvidge - 1995
2	Sofware Support for the Yorktown Simulation Engine – Kronstadt, Pfister - 1982
2	Tortle User's Manual – Lewis - 1993
1	A First Generation DPGA Implementation." MIT Transit Note 114. Accessible via – DeHon
1	Flaw challenges the verities", Electronic Engineering Times – Goering - 1995
1	et al. "Design of FPGAs with Area I/O for Field Programmable MCM," FPGA'95 – Maheshwari

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