Detlef Schmid, Klaus Schneider, Michaela Huhn, George Logothetis, Viktor Sabelfeld  Home/Search
Context
Related
| goethe.ira.uka.de/~schneid...SSHL99.pdf Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: goethe.ira.uka.de/~schneider/m... (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: erifikationswerkzeug C@S, welches speziell fr die formale Verifikation reaktiver eingebetteter Systeme entwickelt wurde. C@S basiert auf einer neu entwickelten synchronen Sprache PURR, deren Konzepte detailliert erlutert werden. Formal Verification of Embedded Systems We describe the verification system C@S developed at our institute that has been designed for the verification of reactive embedded systems. C@S is based on a new synchronous language PURR, whose concepts are discussed in... (Update)
Active bibliography (related documents): More All
0.6: Extending Esterel by Asynchronous Concurrency - Baldamus, Schneider (Correct)
0.5: Symbolic Model Checking of Simply-Timed Systems - Markey, Schnoebelen (2004) (Correct)
0.4: The Argos Language: Graphical Representation of Automata and.. - Maraninchi (1991) (Correct)
Similar documents based on text: More All
1.8: An Integration of Z and Timed CSP for Specifying Real-Time.. - Sühl (2002) (Correct)
1.1: Structure Determination of Piezoelectric Materials At Extreme.. - Pavlovska (2002) (Correct)
1.1: Mikrolaser als Photonen-Billiards: wie Chaos ans Licht kommt - Nöckel (Correct)
BibTeX entry: (Update)
@misc{ schmid-formale,
author = "Detlef Schmid and Klaus Schneider and Michaela Huhn and George Logothetis
and Viktor Sabelfeld",
title = "Formale Verifikation eingebetteter Systeme",
url = "citeseer.ist.psu.edu/309700.html" }
Citations (may not include all citations):1174 Statecharts: A visual formalism for complex systems - Harel - 1987
725 Temporal and Modal Logic (context) - Emerson - 1990
603 Kluwer Academic Publishers (context) - McMillan, Checking - 1993
592 Introduction to HOL: A Theorem Proving Environment for Highe.. (context) - Gordon, Melham - 1993
457 The Esterel synchronous programming language: Design - Berry, Gonthier - 1992
334 A Computational Logic Handbook (context) - Boyer, Moore - 1988
270 Synchronous programming of reactive systems (context) - Halbwachs - 1993
235 The synchronous dataflow programming language LUSTRE - Halbwachs, Caspi et al. - 1991
123 Seven myths of formal methods (context) - Hall - 1990
122 Applications of temporal logic to the specification and veri.. (context) - Pnueli - 1986
94 The foundations of Esterel - Berry - 1998
72 Formal hardware verification methods: A survey (context) - Gupta - 1992
63 Automatic verification of sequential circuits using temporal.. (context) - Browne, Clarke et al. - 1986
62 Seven more myths of formal methods - und, Hinchey - 1994
49 Microprocessor design verification - Hunt - 1989
36 RRL: a rewrite rule laboratory (context) - Kapur, Zhang - 1988
25 Structuring and Automating Hardware Proofs in a Higher-Order.. - Kumar, und et al. - 1993
25 Software Practice and Experience (context) - Boussinot, An et al. - 1991
23 Optimized controller synthesis using Esterel - Touati, Berry - 1993
19 Formal verification of hardware design (context) - Yoeli - 1990
14 semantics and verification of reactive systems by using a pr.. (context) - Maraninchi, graphical - 1989
13 The SECD Microprocessor: A Verification Case Study (context) - Graham - 1992
11 SML: A high level language for the design and verification o.. (context) - Browne, Clarke - 1986
11 A tutorial on using PVS for hardware verification - Owre, Rushby et al. - 1994
10 CTL and equivalent sublanguages of CTL - Schneider - 1997
7 Proving inductive theorems based on term rewriting systems (context) - Hofbauer, Kutsche - 1988
7 Model checking on product structures - Schneider - 1998
6 Synccharts: A visual representation of reactive behaviors (context) - Andre - 1995
6 a declarative language for synchronous programming of real-t.. (context) - Gauthier, und et al. - 1987
3 Modelling and verifying systems and software in propositiona.. (context) - Stlmarck, Sflund - 1990
3 Higher Order Logic Theorem Proving and its Applications (context) - Windley - 1991
3 NATO Advanced Study Institute on Logics and Models for Verif.. (context) - und, Pnueli et al. - 1985
3 Eine Methode zur formalen Verifikation von RISC-Prozessoren (context) - Tahar - 1994
2 A new algorithm for discrete timed symbolic model checking (context) - Ruf, Kropf - 1997
Documents on the same site (http://goethe.ira.uka.de/~schneider/my_papers/): More
Alternative Proof Procedures for Finite-State Machines in .. - Schneider, Kumar, Kropf (1993) (Correct)
Abstraction of Systems with Counters for Symbolic Model.. - Schneider, Logothetis (Correct)
Automating Most Parts of Hardware Proofs in HOL - Schneider, Kumar, Kropf (1991) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC