Eric Rotenberg, Quinn Jacobson, Jim Smith  Home/Search
Context Related
| ncsu.edu/ericro/CI_techreport.ps Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: ncsu.edu/ericro/ (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: An instruction is control independent of a preceding conditional branch if the decision to execute the instruction does not depend on the outcome of the branch -- this typically occurs if the two paths following the branch re-converge prior to the control independent instruction. A speculative instruction that is control independent of an earlier predicted branch does not necessarily have to be squashed and re-executed if the branch is predicted incorrectly. Consequently, control independence... (Update)
Cited by: More
Dataflow: A Complement to Superscalar - Budiu, Artigas, Goldstein (2005) (Correct)
Control Flow Optimization Via Dynamic Reconvergence Prediction - Jamison Collins Dean (2004) (Correct)
Combining Conditional Branching and Predicated Execution - Hyesoon Kim Onur (2005) (Correct)
Similar documents (at the sentence level):
29.2%: A Study of Control Independence in Superscalar Processors - Eric Rotenberg Quinn (1999) (Correct)
22.1%: A Study of Control Independence with a Single Flow of Control - Rotenberg, Jacobson, Smith (Correct)
5.0%: Trace Processors: Exploiting Hierarchy And Speculation - Rotenberg (1999) (Correct)
Active bibliography (related documents): More All
0.2: Characterizing and Removing Branch Mispredictions - Skadron (1999) (Correct)
0.2: Compiling for the Multiscalar Architecture - Vijaykumar (1998) (Correct)
0.2: Instruction Recycling on a Multiple-Path Processor - Wallace, Tullsen, Calder (1999) (Correct)
Similar documents based on text: More All
0.2: Path-Based Next Trace Prediction - Quinn Jacobson (1997) (Correct)
0.2: A Day in the Life of a Data Cache Miss - Karkhanis, Smith (2002) (Correct)
0.2: Modeling Superscalar Processors via Statistical Simulation - Nussbaum, Smith (2001) (Correct)
Related documents from co-citation: More All
8: Trace processors - Rotenberg, Jacobson et al. - 1997
8: Selective Eager Execution on the PolyPath Architecture - Klauser, Paithankar et al. - 1998
7: Disjoint Eager Execution: An Optimal Form of Speculative Execution - Uht, Sindagi et al. - 1995
BibTeX entry: (Update)
Eric Rotenberg, Quinn Jacobson, and Jim Smith, "A Study of Control Independence in Superscalar Processors," to appear in Proc. of 5th International Conference on High Performance Computer Architectures, January 1999. http://citeseer.ist.psu.edu/article/rotenberg99study.html More
@inproceedings{ rotenberg99study,
author = "Eric Rotenberg and Quinn Jacobson and James E. Smith",
title = "A Study of Control Independence in Superscalar Processors",
booktitle = "{HPCA}",
pages = "115-124",
year = "1999",
url = "citeseer.ist.psu.edu/article/rotenberg99study.html" }
Citations (may not include all citations):269 Multiscalar processors - Sohi, Breach et al. - 1995
214 Combining branch predictors - McFarling - 1993
177 Evaluating future microprocessors: The simplescalar toolset - Burger, Austin et al. - 1996
157 Conversion of control dependence to data dependence (context) - Allen, Kennedy et al. - 1983
157 Limits of control flow on parallelism - Lam, Wilson - 1992
152 An efficient method of computing static single assignment fo.. (context) - Cytron, Ferrante et al. - 1989
125 Trace processors - Rotenberg, Jacobson et al. - 1997
107 Global instruction scheduling for superscalar machines (context) - Bernstein, Rodeh - 1991
103 Speculative execution based on value prediction - Gabbay, Mendelson - 1996
100 Dynamic instruction reuse - Sodani, Sohi - 1997
82 Assigning confidence to conditional branch predictions - Jacobsen, Rotenberg et al. - 1996
77 The potential for using thread-level data speculation to fac.. - Steffan, Mowry - 1998
70 The superthreaded architecture: Thread pipelining with run-t.. - Tsai, Yew - 1996
70 The expandable split window paradigm for exploiting fine-gra.. - Franklin, Sohi - 1992
67 ARB: A hardware mechanism for dynamic reordering of memory r.. - Franklin, Sohi - 1996
60 Software and hardware for exploiting speculative parallelism.. - Oplinger, Heine et al. - 1997
59 Branch history table prediction of moving target branches du.. (context) - Kaeli, Emma - 1991
53 Improving superscalar instruction dispatch and issue by expl.. - Vajapeyam, Mitra - 1997
49 The performance potential of data dependence speculation and.. - Sazeides, Vassiliadis et al. - 1996
47 Disjoint eager execution: An optimal form of speculative exe.. - Uht, Sindagi - 1995
45 Threaded multiple path execution - Wallace, Calder et al. - 1998
43 A comparison of full and partial predicated execution suppor.. - Mahlke, Hank et al. - 1995
39 The Multiscalar Architecture - Franklin - 1993
38 Target prediction for indirect jumps - Chang, Hao et al. - 1997
36 Parallelization of loops with exits on pipelined architectur.. (context) - Tirumalai, Lee et al. - 1990
36 Selective eager execution on the polypath architecture - Klauser, Paithankar et al. - 1998
36 architecture: Compiler-assisted fine-grained multithreading (context) - Dubey, O'Brien et al. - 1995
32 Trace processors: Moving to fourth-generation microarchitect.. (context) - Smith, Vajapeyam - 1997
31 Value Locality and Speculative Execution - Lipasti - 1997
27 Guarded execution and branch prediction in dynamic ilp proce.. (context) - Pnevmatikatos, Sohi - 1994
26 Selective dual path execution - Heil, Smith - 1996
25 Compiling for the Multiscalar Architecture - Vijaykumar - 1998
19 Limited dual path execution (context) - Tyson, Lick et al. - 1997
13 Multipath execution: Opportunities and limits - Ahuja, Skadron et al. - 1998
8 Unconstrained speculative execution with predicated state bu.. - Ando, Nakanishi et al. - 1995
6 Multiscalar execution along a single flow of control (context) - Sundararaman, Franklin - 1997
6 Register communication strategies for the multiscalar archit.. - Vijaykumar, Breach et al. - 1997
2 Billion-Transistor Architectures (context) - Patt, Patel et al. - 1997
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://www.tinker.ncsu.edu/ericro/): More
Control Independence in Trace Processors - Rotenberg, Smith (1999) (Correct)
AR-SMT: A Microarchitectural Approach to Fault Tolerance in.. - Rotenberg (1999) (Correct)
Cooperating Threads Architecture: Improving both.. - Sundaramoorthy.. (2000) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC