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Abstract: We present some quantitative performance measurements for the computing power of Programmable Active Memories (PAM), as introduced by [BRV 89]. Based on Programmable Gate Array (PGA) technology, the PAM is a universal hardware co-processor closely coupled to a standard host computer. The PAM can speed up many critical software applications running on the host, by executing part of the computations through a specific hardware PAM design. The performance measurements presented are based on two... (Update)
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BibTeX entry: (Update)
Patrice Bertin, Didier Roncin, and Jean Vuillemin. Programmable active memories: a performance assessment. In Symposium on Integrated Systems, Seattle, WA, USA, March 1993. MIT Press. Also available as PRL research report 24. http://citeseer.ist.psu.edu/bertin92programmable.html More
@inproceedings{ bertin93programmable,
author = "P. Bertin and D. Roncin and J. Vuillemin",
title = "Programmable Active Memories: a Performance Assessment",
booktitle = "Research on Integrated Systems: Proceedings of the 1993 Symposium",
editor = "G. Borriello and C. Ebeling",
pages = "88--102",
year = "1993",
url = "citeseer.ist.psu.edu/bertin92programmable.html" }
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