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by M. Yasugi, S. Matsuoka, A. Yonezawa
In Proc. PACT '94
ftp://camille.is.s.u-tokyo.ac.jp/pub/papers/yasugiPACT94-a4.ps.gz
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Abstract:
Abstract: Plan-do compilation technique is a new, advanced compilation framework for eager data transfer on distributed-memory parallel architectures. The technique is especially effective for a recent breed of low-latency architectures by realizing a highthroughput low-latency communication scheme, pipelined sends. The compilation of highlevel, plan-do style code into low-level, eager data transfer code is achieved via straightforward application of a set of translation rules. Preliminary low-level benchmark results on a real parallel architecture, EM-4, exhibit good speedups.
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