(Enter summary)
Abstract: The technical analysis used in determining which of the Advanced Encryption Standard candidates
will be selected as the Advanced Encryption Algorithm includes e#ciency testing of both hardware and
software implementations of candidate algorithms. Reprogrammable devices such as Field Programmable
Gate Arrays #FPGAs# are highly attractive options for hardware implementations of encryption algorithms
as they provide cryptographic algorithm agility, physical security, and potentially much... (Update)
Context of citations to this paper: More
.... pipelined [104] Multiple FPGA implementation studies have been presented for the AES candidate algo rithm finalists [38, 39, 49, 50, 57, 141, 145], the results of which are found in Table 2.2. Note that [50] is a subset of the study performed in [49] and that no throughput...
...Gate count Cycles block Throughput Ichikawa et al. 6] 518K gates 1. 95 Gbps Weeks et al. 13] 642K transistors 606 Mbps Elbirt et al.[5] 6 300Mbps 14MHz (256 pin I O) 2.1 1.938 Gbps 32 MHz Our hardware circuit 256K gates 0.5 7.5 Gbps 32 MHz using 32 parallel cores...
Cited by: More
Two Methods of Rijndael Implementation in - Fischer, Drutarovsky (2001)
(Correct)
GRIP: A Reconfigurable Architecture for Host-Based .. - Bellows, Flidr.. (2001)
(Correct)
Efficient FPGA Implementations of Block Ciphers.. - Standaert, Rouvroy, .. (2002)
(Correct)
Similar documents (at the sentence level): More
68.7%: An FPGA Implementation and Performance Evaluation of.. - Elbirt, Yip, Chetwynd, .. (2000)
(Correct)
51.8%: An FPGA-Based Performance Evaluation of the AES Block.. - Elbirt, Yip, Chetwynd, .. (2001)
(Correct)
32.6%: Reconfigurable Computing For Symmetric-Key Algorithms - Elbirt
(Correct)
Active bibliography (related documents): More All
0.2: Progress in Professional Practice - Lucht
(Correct)
0.2: Self-Modifying Finite Automata - Power and Limitations - Shutt (1995)
(Correct)
0.2: SEE: A Spatial Exploration Environment Based on a.. - Kaushik, Rundensteiner (1998)
(Correct)
Related documents from co-citation: More All
16: Comparison of the hardware performance of the AES candidates using recon#gurable.. (context) - Gaj, Chodowiec - 2000
15: A Comparative Study of Performance of AES Final Candidates Using FPGAs
- Dandalis, Prasanna et al. - 2000
13: A comparison of the AES candidates amenability to FPGA implementation (context) - Weaver, Wawrzynek - 2000
BibTeX entry: (Update)
A. Elbirt, "An FPGA Implementation and Performance Evaluation of the CAST-256 Block Cipher," Technical Report, Cryptography and Information Security Group, Electrical and Computer Engineering Department, Worcester Polytechnic Institute, Worcester, MA, May 1999. http://citeseer.ist.psu.edu/article/elbirt99fpga.html More
@inproceedings{ elbirt00fpga,
author = "A. J. Elbirt and W. Yip and B. Chetwynd and Christof Paar",
title = "An {FPGA} Implementation and Performance Evaluation of the {AES} Block Cipher Candidate Algorithm Finalists",
booktitle = "{AES} Candidate Conference",
pages = "13-27",
year = "2000",
url = "citeseer.ist.psu.edu/article/elbirt99fpga.html" }
Citations (may not include all citations):
4
Worcester Polytechnic Institute (context) - Report, Information et al. - 1999
1
in First Advanced Encryption Standard #AES# Conference (context) - Cipher - 1998
1
th Annual Workshop on SelectedAreas in Cryptography #SAC '98.. (context) - in - 1998
1
and Test in Europe (context) - Automation - 1998
The graph only includes citing articles where the year of publication is known.
Documents on the same site (http://csrc.nist.gov/encryption/aes/round2/conf3/aes3agenda.html): More
Efficiency Testing of ANSI C Implementations of Round 2 Candidate.. - III (2000)
(Correct)
Speeding up Serpent - Osvik (2000)
(Correct)
A comparison of AES candidates on the Alpha 21264 - Weiss, Binkert (2000)
(Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC