Eliminating invalidation in coherent-cache parallel graph reduction (1994) [1 citations — 1 self]
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Abstract:
Abstract. Parallel functional programs based on the graph reduction execution model display considerable locality of reference, favouring the use of large cache lines in the implementation of the shared heap on a shared-memory multiprocessor. They also display a very high rate of synchronisation, making conventional weakly-consistent coherency protocols ineffective at avoiding unnecessary contention for write access to cache lines due to false sharing. We present the design of a specially adapted cache coherency protocol and show results of simulation experiments which demonstrate that the protocol allows spatial locality to be exploited to at least the level of a conventional invalidation protocol, but without the unnecessary serialisation and network transactions caused by false sharing. 1
Citations
| 224 | Cache Coherence Protocols: Evaluation Using a Multiprocessor Simulation Model – Archibald, Baer - 1986 |
| 89 | Distributed garbage collection using reference counting – Bevan - 1987 |
| 16 | Parallel graph reduction with the h; gi-machine – Augustsson, Johnsson - 1989 |
| 5 | Weak ordering - a new definition and some implications – Adve, Hill - 1989 |
| 5 | Locality and False Sharing in Coherent-Cache Parallel Graph Reduction – Bennett, Kelly - 1993 |
| 4 | Parallel graph reduction for shared-memory architectures – Bennett - 1993 |
