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Abstract: We address the problem of formally verifying arithmetic instructions of microprocessors implemented by microprograms that contain loops. We try to avoid theorem proving techniques using a new symbolic representation: Binary Moment Diagrams (*BMDs). In order to use *BMDs for verifying sequential circuits as well as microprograms, we extend this representation and dene several bit-vector level operators. This extension is then integrated into an automatic verification system. We illustrate the... (Update)
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BibTeX entry: (Update)
@misc{ arditi-bmds,
author = "Laurent Arditi",
title = "$\ast${BMD}s Can Delay the Use of Theorem Proving for Verifying Arithmetic Assembly
Instructions",
url = "citeseer.ist.psu.edu/254873.html" }
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A Bit-Vector Algebra for Binary Moment Diagrams - Arditi (Correct)
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