Abstract:
In this work a set of tools is developed to convert programs for Programmable Logic Controllers (PLCs) into timed automata in order to facilitate the verification of such programs. It is shown that our timed automata models of PLC programs can be dissected into a timed and an untimed part. Typically, the untimed part is much larger than the timed part and can be reduced in size by using the CADP toolset. The reduction in state space is substantial, even for small PLC programs.
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