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Abstract: ASICs offer the best realization of DSP algorithms in terms of performance, but the cost is prohibitive, especially when the volumes involved are low. However, if the architecture synthesis trajectory for such algorithms is such that the target architecture can be identified as an interconnection of elementary parameterized computational structures, then it is possible to attain a close match, both in terms of performance and power with respect to an ASIC, for any algorithmic parameters of the... (Update)
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BibTeX entry: (Update)
@misc{ ramanathan-synthesis,
author = "S. Ramanathan and V. Visvanathan and S. K. Nandy",
title = "Synthesis of ASIPs for DSP Algorithms",
url = "citeseer.ist.psu.edu/232848.html" }
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