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Abstract: Advances in microprocessor technology have resulted in the situation where CPU performance is improving faster than DRAM main memory performance. While it is true that current differences between CPU and DRAM speeds are not yet at the point where DRAM should be considered a slow peripheral, it is worthwhile considering the possibility of current trends continuing long enough that DRAM does resemble a slow peripheral. Eventually, a cache miss to DRAM could resemble a main memory page fault to... (Update)
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BibTeX entry: (Update)
@misc{ meerdervoort-performance,
author = "Lance Pompe v Meerdervoort",
title = "Performance Implications of Context Switches on Misses to DRAM",
url = "citeseer.ist.psu.edu/228352.html" }
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