Marco Fillo, Stephen W. Keckler, William J. Dally, Nicholas P. Carter, Andrew Chang, Yevgeny Gurevich, Whay S. Lee  Home/Search
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Abstract: The M--Machine is an experimental multicomputer being developed to test architectural concepts motivated by the constraints of modern semiconductor technology and the demands of programming systems. The M--Machine computing nodes are connected with a 3--D mesh network; each node is a multithreaded processor incorporating 9 function units, on-chip cache, and local memory. The multiple function units are used to exploit both instruction-level and thread-level parallelism. A user accessible... (Update)
Context of citations to this paper: More
...that are difficult, if not impossible, for the compiler to detect at compile time. Therefore, multithreaded architectures [6, 8, 14, 18, 21] require hardware to support data dependence checking and speculative execution. In many multithreaded architectures, the compiler...
...4.18 717 1421 1.98 quicksort 195356 285565 1.46 124230 147229 1.19 96745 113460 1. 17 6] Both link level [1] and end to end [2, 14] protocols have been proposed which improve system performance by limiting message injection rates; the end to end flow control protocol uses a...
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BibTeX entry: (Update)
M. Fillo, S. Keckler, W. Dally, N. Carter, A. Chang, Y. Gurevich, and W. Lee. "The M-Machine multicomputer." In Proc. 28th Annual International Symposium on Microarchitecture (MICRO-28), Ann Arbor MI, November 1995, pp. 146--156. http://citeseer.ist.psu.edu/article/fillo95mmachine.html More
@techreport{ fillo95mmachine,
author = "Marco Fillo and Stephen W. Keckler and William J. Dally and Nicholas P. Carter and Andrew Chang and Yevgeny Gurevich and Whay S. Lee",
title = "The {M}-Machine Multicomputer",
number = "AIM-1532",
month = "30,",
pages = "13",
year = "1995",
url = "citeseer.ist.psu.edu/article/fillo95mmachine.html" }
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