by Karsten Strehl, Lothar Thiele, Dirk Ziegenbein, Rolf Ernst
In International Workshop on Hardware/Software Codesign
ftp://ftp.tik.ee.ethz.ch/pub/publications/TIK-Report67.ps.gz
Add To MetaCart
Abstract:
In this report, a scheduling method for heterogeneous embedded systems is developed. At first, an internal representation model called FunState is presented which enables the explicit representation of non-determinism and scheduling using a combination of functions and state machines. The new scheduling method is able to deal with mixed data/control flow specifications and takes into account different mechanisms of non-determinism as occurring in the design of embedded systems. Constraints imposed by other already implemented components are respected. The scheduling approach avoids the explicit enumeration of execution paths by using symbolic techniques and guarantees to find a deadlock-free and bounded schedule if one exists. The generated schedule consists of statically scheduled basic blocks which are dynamically called at run time.
Citations
|
2317
|
Graph-Based Algorithms for Boolean Function Manipulation
– Bryant
- 1986
|
|
1713
|
Statecharts: A visual formalism for complex systems
– Harel
- 1987
|
|
1128
|
Symbolic Model Checking
– McMillan
- 1993
|
|
403
|
Synthesis and Optimization of Digital Circuits
– DeMicheli
- 1994
|
|
286
|
Synchronous data flow
– Lee, Messerschmitt
- 1987
|
|
164
|
Dataflow process networks
– Lee, Parks
- 1995
|
|
136
|
Hardware-Software Co-Design of Embedded Systems: The POLIS Approach
– Balarin, Chiodo, et al.
- 1997
|
|
121
|
Scheduling Dynamic Dataflow Graphs with Bounded Memory Using the Token Flow Model
– Buck
- 1993
|
|
74
|
Algorithms for discrete function manipulation
– Srinivasan, Kam, et al.
- 1990
|
|
54
|
Relative scheduling under timing constraints: Algorithms for high-level synthesis of digital circuits
– Ku, Micheli
- 1992
|
|
20
|
Software synthesis for real-time information processing systems
– Thoen, Corncro, et al.
- 1995
|
|
19
|
Symbolic model checking of process networks using interval diagram techniques
– Strehl, Thiele
- 1998
|
|
19
|
Combining multiple models of computation for scheduling and allocation
– Ziegenbein, Ernst, et al.
- 1998
|
|
16
|
Compile-time scheduling of dynamic constructs in dataflow program graphs
– Ha, Lee
- 1997
|
|
15
|
Quasi-Static Scheduling of Embedded Software Using Free-Choice Petri Nets
– Sgroi, Lavagno, et al.
- 1998
|
|
15
|
Representation of process mode correlation for scheduling
– Ziegenbein, Richter, et al.
- 1998
|
|
10
|
Interval diagram techniques for symbolic model checking of Petri nets
– Strehl, Thiele
- 1999
|
|
9
|
Symbolic Model Checking Using Interval Diagram Techniques
– Strehl, Thiele
- 1998
|
|
8
|
Using Interval Diagram Techniques for the Symbolic Verification of Timed Automata
– Strehl
- 1998
|
|
6
|
Efficient encoding for exact symbolic automatabased scheduling
– Haynal, Brewer
- 1998
|
|
4
|
Dynamic Scheduling and Synchronization Synthesis of Concurrent Digital Systems under System-Level Constraints
– Micheli
- 1994
|
|
4
|
Recurrences, iteration, and conditionals in statically scheduled block diagram languages
– Lee
- 1988
|
|
3
|
Ensemble representation and techniques for exact control-dependent scheduling
– Radivojevic, Brewer
- 1994
|
|
1
|
SCF---state machine controlled flow diagrams
– Thiele, Teich, et al.
- 1998
|
