Use of VHDL Environment for Interactive Synthesis of Asynchronous Circuits N.A.Starodoubtsev A.V.Yakovlev
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http://www.cs.ncl.ac.uk/research/trs/papers/540.ps
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Abstract:
The paper describes the idea of VHDL-based synthesis of asynchronous control circuits from Signal Transition Graphs. A set of VHDL representation forms is defined which allow the designer: (1) to interact with the synthesis process more closely, using the full range of tools (simulation, visualization etc.) available in VHDL environments; (2) to transition between the forms smoothly, sometimes using "mixed " forms, thus efficiently combining partial logic circuit implementations with event-based descriptions of the surrounding parts. Topics: Synthesis (VHDL in Synthesis); Specification and modeling methodologies;
