(Enter summary)
Abstract: A number of researchers have proposed using digital marks to provide ownership
(watermarking) and recipient (fingerprinting) identification for intellectual property. Many of these
techniques share three specific weaknesses: complexity of copy detection, vulnerability to mark removal
after revelation for ownership verification, and mark integrity issues due to partial mark removal. This
paper presents a method for watermarking and fingerprinting field programmable gate array (FPGA)
intellectual ... (Update)
Context of citations to this paper: More
.... trees, thus allowing tracing infringement to the source, as suggested in [1] Unlike other approaches found in the literature [1, 2, 3, 4], the proposed scheme does not require any modification of the original designs and it is used merely as a verification methodology....
...digital signal processing methods. Schemes based on watermarking have been recently proposed for electronic IP s as well. In [4] and [5], the watermark assumes the form of a extraneous circuit, hidden inside large fieldprogrammable gate arrays (FPGA s) Such circuits are...
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BibTeX entry: (Update)
J. Lach, W. H. Mangione-Smith and M. Potkonjak, "Robust FPGA Intellectual PropertyProtection through Multiple Small Watermarks ", in Proc. IEEE/ACM Design Automation Conference, pp. 831--836, June 1999. http://citeseer.ist.psu.edu/article/lach99robust.html More
@inproceedings{ lach99robust,
author = "John Lach and William H. Mangione-Smith and Miodrag Potkonjak",
title = "Robust {FPGA} Intellectual Property Protection Through Multiple Small Watermarks",
booktitle = "Design Automation Conference",
pages = "831-836",
year = "1999",
url = "citeseer.ist.psu.edu/article/lach99robust.html" }
Citations (may not include all citations):
635
New Directions on Cryptography
- Diffie, Hellman - 1976
212
Techniques for Data Hiding (context) - Bender - 1996
83
Transparent Robust Image Watermarking
- Swanson - 1996
69
Digital Watermarks for Audio Signals
- Boney - 1996
68
A Watermark for Digital Images
- Wolfgang, Delp - 1996
51
Can Invisible Watermarks Resolve Rightful Ownership
- Craver - 1997
49
A 160MHz 32b 0.5W CMOS RISC Microprocessor (context) - Montanaro - 1996
42
ARM System Architecture (context) - Furber - 1996
40
Configurable Computing Solutions for Automatic Target Recogn.. (context) - Villasenor - 1996
39
Secure Spread Spectrum Watermarking for Images, Audio, and V.. (context) - Cox - 1996
34
Watermarking Techniques for Intellectual Property Protection
- Kahng - 1998
32
Robust IP Watermarking Methodologies for Physical Design
- Kahng - 1998
28
Performance Study of a Selective Encryption Scheme for the S.. (context) - Spanos, Maples - 1995
22
Hierarchical Watermarking in IC Design
- Charbon - 1998
20
Fingerprinting Digital Circuits on Programmable Hardware
- Lach, Mangione-Smith et al. - 1998
20
Low Overhead Fault-Tolerant FPGA Systems
- Lach, Mangione-Smith et al. - 1998
16
Copyright Protection in Video Delivery Networks by Watermark..
- Hartung, Girod - 1997
16
Behavioral Synthesis Techniques for Intellectual Property Pr..
- Hong, Potkonjak - 1997
16
A Case Study of Partially Evaluated Hardware Circuits: Key-S..
- Leonard, Mangione-Smith - 1997
12
ARM Grabs Embedded Speed Lead (context) - Turley - 1996
10
Personal Communication (context) - Trimberger - 1997
10
Signature Hiding Techniques for FPGA Intellectual Property P..
- Lach, Mangione-Smith et al. - 1998
9
Data Hiding for Multimedia Personalization, Interaction, and.. (context) - Tewfik, Swanson - 1997
4
IP98 Forum Exposes Struggling Industry -- Undefined Business.. (context) - Goering - 1998
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Optimization-Intensive Watermarking Techniques for Decision.. - Gang Qu (1999)
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Behavioral Synthesis Techniques for Intellectual Property.. - Hong, Potkonjak (1997)
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