Abstraction of Systems with Counters for Symbolic Model Checking
|
Abstract:
Abstract Model checking of temporal logics has become a standard technique for the verification of finite state reactive systems. However, these procedures suffer from the so-called state explosion problem which limits their practical use. Therefore, appropriate abstractions have to be applied to reduce the state space if these tools are to be applied to real-world problems. In particular, counters are hard to verify with model checking procedures. Hence, we present in this paper a special abstraction technique for counters that leads to very small, and in particular finite, state spaces. The method even allows in many cases to verify generic systems without interactive theorem proving, i.e. without induction. As counters are often used for the implementation of control systems, the method presented here is of essential importance for the verification of these systems. 1
Citations
| 1309 | Abstract interpretation: a unified lattice model for static analysis of programs by construction or approximation of fixpoints – Cousot, Cousot - 1977 |
| 1170 | Symbolic Model Checking – McMillan - 1993 |
| 923 | E.A.: Temporal and modal logic – Emerson - 1990 |
| 558 | Model checking and abstraction – Clarke, Grumberg, et al. - 1994 |
| 32 | Verus: A tool for quantitative analysis of finitestate real-time systems – Campos, Clarke, et al. - 1995 |
| 9 | Integrating design and verification environments through a logic supporting hardware diagrams – Fisler, Johnson - 1995 |
| 7 | Verification of systems containing counters – Macii, Plessier, et al. - 1992 |
| 4 | The backward walk approach in FSM verification – Krischer - 1993 |
| 4 | The C@S system: Combining proof strategies for system verification – Schneider, Kropf - 1997 |
| 2 | Verification and synthesis of counters based on symbolic techniques – Cabodi, Camurati, et al. - 1997 |
