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Worst-Case Execution Time Analysis for Modern Hardware Architectures (1997)  (Make Corrections)  (31 citations)
Greger Ottosson
ACM SIGPLAN 1997 Workshop on Languages, Compilers, and Tools for Real-Time Systems (LCT-RTS'97)



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Abstract: We present a method for determining the worst case execution time (WCET) for programs running on systems with modern hardware architectures, e.g. pipelined processors and cache memory. The method is based on the implicit path enumeration technique (IPET), in which all possible execution paths of a program are described by placing constraints on, and relations between, the number of executions of different parts of the program. The execution times for all paths are expressed in terms of those... (Update)

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BibTeX entry:   (Update)

G. Ottosson and M. Sjodin. Worst-case execution time analysis for modern hardware architectures. In Proceedings of ACM SIGPLAN Workshop on Language, Compiler, and Tool Support for Real-Time Systems, June 1997. http://citeseer.ist.psu.edu/article/ottosson97worstcase.html   More

@inproceedings{ ottosson97worstcase,
    author = "Greger Ottosson and Mikael Sj{\"o}din",
    title = "Worst-Case Execution Time Analysis for Modern Hardware Architectures",
    booktitle = "{ACM} {SIGPLAN} 1997 Workshop on Languages, Compilers, and Tools for Real-Time Systems ({LCT}-{RTS}'97)",
    year = "1997",
    url = "citeseer.ist.psu.edu/article/ottosson97worstcase.html" }
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