Stylianos Perissakis, Christoforos E. Kozyrakis, Thomas Anderson, Krste Asanovic, Neal Cardwell, Richard Fromm, Jason Golbus, Benjamin Gribstad, Kimberly Keeton, David Patterson, Randi  Home/Search
Context
Related
| berkeley.edu/~kkeeton/Pape...1Bxtors.ps Cached: PS.gz PS PDF This document uses CoBlitz to cache paper downloads. If your firewall is blocking outgoing connections to port 3125, you can use these links to download local copies.
Image Update HelpPS.gz PS PDF From: berkeley.edu/~kkeeton/Papers/ (more) (Enter author homepages) |
Rate this article:      (best)Comment on this article |
Abstract: Conventional architectures have been developed with a transistor budget of a few hundred thousand and have evolved to designs of about 10 million transistors, achieving impressive performance. However, we believe that these architectures will not scale efficiently another hundredfold to utilize billion-transistor chips effectively. Here we introduce an alternative way of using the huge amount of real estate available on such a chip: integrating the processor and the main memory on the same die. ... (Update)
Similar documents (at the sentence level):
12.6%: Scaling Processors to 1 Billion Transistors and Beyond: .. - Perissakis, Kozyrakis, .. (Correct)
11.7%: Scalable Processors in the Billion-Transistor Era: IRAM - Kozyrakis, Perissakis.. (1997) (Correct)
Active bibliography (related documents): More All
0.2: Computing within Memory Using Transforms - Richard Kendall (1997) (Correct)
0.1: Intelligent RAM (IRAM): the Industrial Setting.. - Patterson.. (Correct)
0.1: FlexRAM: Toward an Advanced Intelligent Memory System - Kang, Huang, Yoo, Torrellas (1999) (Correct)
Similar documents based on text: More All
0.4: The Energy Efficiency of IRAM Architectures - Fromm, Perissakis, Cardwell.. (1996) (Correct)
0.3: A Case for Intelligent RAM: IRAM - Patterson, Anderson, Cardwell.. (1997) (Correct)
0.3: An Architectural Performance Study of the Fast Fourier Transform.. - Thomas (2000) (Correct)
BibTeX entry: (Update)
@misc{ perissakis-scaling,
author = "Stylianos Perissakis and Christoforos E. Kozyrakis and Thomas Anderson
and Krste Asanovic and Neal Cardwell and Richard Fromm and Jason Golbus
and Benjamin Gribstad and Kimberly Keeton and David Patterson and Randi",
title = "Scaling Processors to 1 Billion Transistors and Beyond: IRAM",
url = "citeseer.ist.psu.edu/155950.html" }
Citations (may not include all citations):1575 Computer Architecture: A Quantitative Approach (context) - Hennessy, Patterson - 1996
56 A Case for Intelligent RAM: IRAM - Patterson, Anderson et al. - 1997
37 The Energy Efficiency of IRAM Architectures - Fromm, Perissakis et al. - 1997
26 DataScalar Architectures (context) - Burger, Kaxiras et al. - 1997
17 Evaluation of Existing Architectures in IRAM Systems - Bowman, Cardwell et al. - 1997
10 Distributed Vector Architecture: Beyond a Single Vector IRAM (context) - Kaxiras, Sugumar et al. - 1997
9 IRAM and SmartSIMM: Overcoming the I/O Bus Bottleneck (context) - Keeton, Arpaci-Dusseau et al. - 1997
2 Vector Microprocessors (context) - Asanovi'c - 1997
1 Workshop on Mixing Logic and DRAM (context) - Lee - 1997
1 DRAM + Logic Integration: Which Architecture and Fabrication.. (context) - Discussion - 1996
Documents on the same site (http://www.cs.berkeley.edu/~kkeeton/Papers/): More
Performance Characterization of a Quad Pentium Pro .. - Keeton.. (1998) (Correct)
Providing Network Video Service to Mobile Clients - Bruce Mah (1993) (Correct)
Computer Architecture Support for Database Applications - Keeton (1999) (Correct)
Online articles have much greater impact More about CiteSeer.IST Add search form to your site Submit documents Feedback
CiteSeer.IST - Copyright Penn State and NEC