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Abstract: Memory latency is an important bottleneck in system performance that cannot be adequately solved by hardware alone. Several promising software techniques have been shown to address this problem successfully in specific situations. However, the generality of these software approaches has been limited because current architectures do not provide a fine-grained, low-overhead mechanism to observe memory behavior directly. To fill this need, we propose a new set of memory operations called informing ... (Update)
Context of citations to this paper: More
...mechanism offers quicker control transfers than current cache miss counters. Our second method (evaluated more fully in an earlier study [HMMS95] removes the explicit user state for the hit miss information, but retains the explicit dispatch instruction. In this case, the...
...which can be collected using informing memory operations is the precise miss rate of all memory references. A previous study [10] has demonstrated that per reference miss rates can be captured with low runtime overheads (less than a 25 ) and tolerable data cache...
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BibTeX entry: (Update)
M. Horowitz, M. Martonosi, T. C. Mowry, and M. D. Smith. Informing Loads: Enabling Software to Observe and React to Memory Behavior. Stanford CSL Technical Report CSL-TR-95-673. Stanford University. July 1995. http://citeseer.ist.psu.edu/article/horowitz95informing.html More
@techreport{ horowitz95informing,
author = "Mark Horowitz and Margaret Martonosi and Todd C. Mowry and Michael D. Smith",
title = "Informing Loads: Enabling Software to Observe and React to Memory Behavior",
number = "CSL-TR-95-673",
pages = "23",
year = "1995",
url = "citeseer.ist.psu.edu/article/horowitz95informing.html" }
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