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  Switching Activity Estimation using Limited Depth Reconvergent Path Analysis (1997) [16 citations — 3 self]

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by Jose C. Costa, Jose C. Monteiro, Srinivas Devadas
In Proceedings of the International Symposium on Low Power Electronics and Design
http://www.caa.lcs.mit.edu/~devadas/pubs/poly.ps
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Abstract:

We describe a method of polynomial simulation to calculate switching activities in a general-delay combinational logic circuit. This method is a generalization of the exact signal probability evaluation method due to Parker and McCluskey, which as been extended to handle temporal correlation and arbitrary transport delays. Our method is parameterized by a single parameter l, which determines the speed-accuracy tradeoff. l indicates the depth in terms of logic levels over which spatial signal correlation is taken into account. This is done by only taking into account reconvergent paths whose length is at most l. The rationale is that ignoring spatial correlation for signals that reconverge after many levels of logic introduces negligible error. We present results that show that the error in the switching activity and power estimates is very small even for small values of l. In fact, for most of the examples we tried, power estimates with l = 1 are within 5 % of the exact. However, this error can be higher than 20 % for some examples. More robust estimates are obtained with l = 2, providing a good compromise between speed and accuracy. I.

Citations

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105 A fast algorithm for finding dominators in a flowgraph – Lengauer, Tarjan - 1979
87 Transition density, a stochastic measure of activity – Najm - 1991
84 Probabilistic Treatment of General combinational Networks – Parker, McCluskey - 1975
55 Probabilistic simulation for reliability analysis – Najm, Burch, et al. - 1990
38 Switching Activity Analysis Considering Spatiotemporal Correlations – Marculescu, Marculescu, et al. - 1994
32 Estimating dynamic power consumption of CMOS circuits – Cirit - 1987
27 PREDICT—Probabilistic estimation of digital circuit testability – Seth, Pan, et al. - 1985
24 Improving the Accuracy of Circuit Activity Measurement – Kapoor - 1994
16 Efficient estimation of dynamic power dissipation under a real delay model – Tsui, Pedram, et al. - 1993
12 Estimation of Average Switching Activity in Combinational Logic Circuits Using Symbolic Simulation – Monteiro, Devadas, et al. - 1997
12 Switching Activity Analysis using Boolean Approximation Method – Uchino, Minami, et al. - 1995
5 Estimation of Digital CMOS Circuits and the Application to Logic Synthesis for Low Power – Power - 1995