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Abstract: An accurate and safe estimation of a task's worst case execution time (WCET) is crucial for reasoning about the timing properties of real-time systems. In RISC processors, the execution time of a program construct (e.g., a statement) is affected by various factors such as cache hits/misses and pipeline hazards, and these factors impose serious problems in analyzing the WCETs of tasks. To analyze the timing effects of RISC's pipelined execution and cache memory, this paper proposes extensions ... (Update)
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BibTeX entry: (Update)
S. Lim, Y. H. Bae, G. T. Jang, B. D. Rhee, S. L. Min, C. Y. Park, H. Shin, K. Park and C. S. Kim. "An Accurate Worst Case Timing Analysis Technique for RISC Processors". Proceedings of the 15th IEEE Real-Time Systems Symposium, pages 97-108, San Juan, Puerto Rico, December 1994. http://citeseer.ist.psu.edu/article/lim94accurate.html More
@misc{ lim94accurate,
author = "S. Lim and Y. Bae and G. Jang and B. Rhee and S. Min and C. Park and H.
Shin and K. Park and C. Kim",
title = "An Accurate Worst Case Timing Analysis Technique for RISC Processors",
text = "S. Lim, Y. H. Bae, G. T. Jang, B. D. Rhee, S. L. Min, C. Y. Park, H. Shin,
K. Park and C. S. Kim. An Accurate Worst Case Timing Analysis Technique
for RISC Processors. Proceedings of the 15th IEEE Real-Time Systems Symposium,
pages 97-108, San Juan, Puerto Rico, December 1994.",
year = "1994",
url = "citeseer.ist.psu.edu/article/lim94accurate.html" }
Citations (may not include all citations):1575 Computer Architecture: A Quantitative approach (context) - Hennessy, Patterson - 1990 ACM
222 MIPS RISC Architecture (context) - Kane, Heimrich - 1991 ACM
167 Calculating the Maximum Execution Time of Real-Time Programs (context) - Puschner, Koza - 1989 DBLP
103 Experiments With A Program Timing Tool Based On Source-Level.. (context) - Park, Shaw - 1990
102 A Characterization of the Minimum Cycle Mean in a Digraph (context) - Karp - 1978
97 The Architecture of Pipelined Computers (context) - Kogge - 1981
96 AddisonWesley Publishing Company (context) - Aho, Sethi et al. - 1988
93 Aspects of Cache Memory and Instruction Buffer Performance (context) - Hill - 1987 ACM
92 Reasoning About Time in HigherLevel Language Software - Shaw - 1989
83 A Retargetable Technique for Predicting Execution Time - Harmon, Baker et al. - 1992 DBLP
69 Register Allocation by Priority-based Coloring (context) - Chow, Hennessy - 1984 ACM DBLP
63 A code generation interface for ANSI C - Fraser, Hanson - 1990 ACM DBLP
55 Pipelined Processors and Worst-Case Execution Times - Zhang, Burns et al. - 1993
54 Evaluating Tight Execution Time Bounds of Programs by Annota.. (context) - Mok - 1989
42 Strategic Memory Allocation for Real-Time) Cache Design (context) - Kirk - 1989
28 Cummings Publishing Company (context) - Fischer, Leblanc et al. - 1991
24 Predicting Instruction Cache Behavior - Mueller, Whalley et al. - 1993
21 A Real-Time Language with a Schedulability Analyzer (context) - Stoyenko - 1987 ACM
18 Static Analysis of Cache Performance for Real-Time Programmi.. (context) - Rawat - 1993
17 Predictable Real-Time Caching in the Spring System (context) - Niehaus, Nahum et al. - 1991
13 Portable Execution Time Analysis for RISC Processors (context) - Narasimhan, Nilsen - 1994
4 Process Dependent Static Cache Partitioning for Real-Time Sy.. (context) - Kirk - 1988 DBLP
3 Data Cache Analysis Techniques for Real-Time Systems (context) - Bae - 1994
3 Timing Analysis of Superscalar Processor Programs Using ACSR - Choi, Lee et al. - 1994
3 Issues of Advanced Architectural Features in the Design of a.. (context) - Rhee, Lim et al. - 1994
3 Instruction Cache and Pipelining Analysis Techniques for Rea.. (context) - Lim - 1994
2 High-Level Timing Specification of Instruction-Level Paralle.. - Harcourt, Mauney et al. - 1993
1 Incorporating Caches in Real-Time Systems (context) - Basumalick, Nilsen - 1994
The graph only includes citing articles where the year of publication is known.
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