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Abstract: . A single chip system for real--time mpeg--2 decoding can be created by integrating a general purpose dual--issue risc processor, with a small dedicated hardware for the variable length decoding (vld) and block loading processes; a 32kb instruction ram; and a 32kb data ram. The vld hardware performs Huffman decoding on the input data. The block loader performs the half--sample prediction for motion compensation and acts as a direct memory access (dma) controller for the risc processor by... (Update)
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BibTeX entry: (Update)
@misc{ holmann-single,
author = "Edgar Holmann",
title = "Single Chip Dual-Issue RISC Processor for Real-Time MPEG-2 Software Decoding",
url = "citeseer.ist.psu.edu/121536.html" }
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