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Abstract: This paper discusses three techniques useful in relaxing the constraints imposed by control flow on parallelism: control dependence analysis, executing multiple flows of control simultaneously, and speculative execution. We evaluate these techniques by using trace simulations to find the limits of parallelism for machines that employ different combinations of these techniques. We have three major results. First, local regions of code have limited parallelism, and control dependence analysis is... (Update)
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BibTeX entry: (Update)
Monica S. Lam and Robert P. Wilson. Limits of control flow on parallelism. In Proceedings of the 19th Annual International Symposium on Computer Architecture, pages 46--57, May 19--21, 1992. http://citeseer.ist.psu.edu/111342.html More
@inproceedings{ lam92limits,
author = "M. S. Lam and R. P. Wilson",
title = "Limits of control flow on parallelism",
booktitle = "Nineteenth International Symposium on Computer Architecture",
publisher = "ACM and IEEE Computer Society",
address = "Gold Coast, Australia",
pages = "46--57",
year = "1992",
url = "citeseer.ist.psu.edu/111342.html" }
Citations (may not include all citations):407 Trace Scheduling: A Technique for Global Microcode Compactio.. (context) - Fisher - 1981
230 Limits of Instruction-Level Parallelism - Wall - 1991
193 Superscalar Microprocessor Design (context) - Johnson - 1990
152 An Efficient Method of Computing Static Single Assignment Fo.. (context) - Cytron, Ferrante et al. - 1989
130 A VLIW Architecture for a Trace Scheduling Compiler (context) - Colwell, Nix et al. - 1988
112 Highly Concurrent Scalar Processing (context) - Hsu, Davidson - 1986
107 Global Instruction Scheduling for Superscalar Machines (context) - Bernstein, Rodeh - 1991
84 Reducing the Cost of Branches (context) - McFarling, Hennessy - 1986
82 Limits on Multiple Instruction Issue - Smith, Johnson et al. - 1989
74 Instruction Issue Logic for High-Performance (context) - Sohi, Vajapeyam - 1987
67 Measuring the Parallelism Available for Very Long Instructio.. (context) - Nicolau, Fisher - 1984
66 Boosting Beyond Static Scheduling in a Superscalar Processor - Smith, Lam et al. - 1990
57 The Inhibition of Potential Parallelism by Conditional Jumps (context) - Riseman, Foster - 1972
57 Implementation of Precise Interrupts in Pipelined Processors - Smith, Pleszkun - 1985
31 Comparing Software and Hardware Schemes For Reducing the Cos.. - Hwu, Conte et al. - 1989
8 A High Performance Microarchitecture (context) - Patt, Melvin et al. - 1985
3 Single Instruction stream/Multiple instruction Pipelining) :.. (context) - Murakami, Irie et al. - 1989
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